hardware debug中文是什么意思

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中文翻譯
造句

硬件調(diào)試

hardware 〔集合詞〕 1.五金器具；金屬制品。 2.( ...
debug vt. (-bugged; -bugging) 1.驅(qū)除 ...
debug vt. (-bugged; -bugging) 1.驅(qū)除(某處的)害蟲。 2.排除(飛機(jī)等的)故障；(自動化裝置中)移去(程序等中的)錯誤。 3.【無線電】調(diào)整，調(diào)諧。 4.尋出并拆除…內(nèi)的竊聽器。 5.(用電子儀器)使(竊聽器)失效。 debugger 拆除竊聽器專家。
debug ( 開啟除錯檢視窗口
hardware 〔集合詞〕 1.五金器具；金屬制品。 2.(計(jì)算機(jī)的)硬件；(電子儀器的)零件，部件；(飛彈的)構(gòu)件；機(jī)器；計(jì)算機(jī)。 3.電化教學(xué)設(shè)備〔指錄音機(jī)、電唱機(jī)、閉路電視等〕。 4.(軍隊(duì)或警察的)武器裝備；〔英俚〕重武器。
hardware hardware 五金用品
arithmetic debug 運(yùn)算調(diào)試
debug aid 調(diào)試輔助程序, 調(diào)式工具
debug aids 調(diào)試輔助程序; 調(diào)試工具
debug build 調(diào)試版本
debug card 除錯卡; 調(diào)試卡片
debug command 調(diào)試命令
debug control 調(diào)試控制
debug debugger 偵錯程序
debug driver 翟程序
debug function 調(diào)試功能
debug grip 偵錯程式語言
debug heap 調(diào)試堆積; 偵錯堆積
debug item 調(diào)試項(xiàng)目
debug kernel 調(diào)試核心
debug line 排錯行
debug machine 調(diào)機(jī), 故障排除機(jī); 調(diào)試機(jī); 故障排除機(jī)
debug macro 調(diào)式宏指令; 調(diào)試宏指令
debug macroinstruction 調(diào)試宏指令
debug method 調(diào)試方法

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例句與用法

Finally , the circuit board is designed and the hardware debug is performed
最后設(shè)計(jì)系統(tǒng)的硬件電路板，完成整個系統(tǒng)的軟硬件調(diào)試。
A hardware debugging tool that allows you to view the voltage on one or more electrical lines
一種硬件調(diào)試工具，它讓你能觀察到一個或更多電路上的電壓。
Finally , the circuit board is designed , the software and hardware debugging is performed
最后介紹了基于pci接口的位同步器的硬件電路設(shè)計(jì)實(shí)現(xiàn)和整個系統(tǒng)的軟硬件調(diào)試。
Hardware debug : read bios check point value , compare with bios error code message , will know defective position
讀取bios檢查點(diǎn)check point之值,此時將error code位置數(shù)字顯示器所顯示
Designing the circuit board with the eda software protel , downloading the control programme and completing the hardware debug 5
4 .用eda軟件protel設(shè)計(jì)電路板，下載控制程序，完成系統(tǒng)的硬件調(diào)試。
Finally , the hardware debugging has been done . in this thesis , the developing status of dtv is introduced firstly
目前時域同步的verilog模塊設(shè)計(jì)已經(jīng)完成,并且通過了fpga片上調(diào)試,達(dá)到預(yù)期效果。
3 . completing the circuit design based on the serial fiber transmission and the parallel fiber transmission and theirs hardware debug
3 ：設(shè)計(jì)了通過光纖傳輸?shù)拇袀鬏敺绞胶筒⑿袀鬏敺绞降碾娐凡⑼瓿闪擞布{(diào)試。
Now the hardware debugging is finished and the whole controller works successfully . the second goal is the remote control design based on sopc
本文通過合理選擇微處理器、 i / o的復(fù)用設(shè)計(jì)和程序的優(yōu)化達(dá)到了設(shè)計(jì)指標(biāo)，硬件調(diào)試工作已經(jīng)全部完成。
The designing process of the edac circuit is described in the paper . the time simulation is analysed , too . the designment of the circuit has access the hardware debug , and can woks normally
此外還將第一輪設(shè)計(jì)中的基本邏輯器件如與、或、非門以及諸如244 、 255 、譯碼器等小規(guī)模元器件都集成到fpga內(nèi)部來實(shí)現(xiàn)。
Beginning with indagation and choosing of parts , we have achieved its theory project , schematics , pcb drawings , hardware debugging and replantation of real time operating system ( rtos )
本文從元器件調(diào)研、選型開始完成了386ex航天計(jì)算機(jī)的原理設(shè)計(jì)，原理圖、 pcb繪制，硬件調(diào)試，并實(shí)現(xiàn)了vxworks實(shí)時多任務(wù)操作系統(tǒng)( rtos )的移植。

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